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first. The AT25F4096 will automatically return to the write disable state at the completion
of the Program cycle.
Note:
If the device is not write enabled (WREN), the device will ignore the Write instruction and
will return to the standby state, when CS is brought high. A new CS falling edge is
required to re-initiate the serial communication.
Table 10. Address Key
Address
A N
Don’t Care Bits
AT25F4096
A 18 - A 0
A 23 - A 19
SECTOR ERASE (SECTOR ERASE): Before a byte can be reprogrammed, the sector
which contains the byte must be erased. In order to erase the AT25F4096, two separate
instructions must be executed. First, the device must be write enabled via the WREN
instruction. Then the Sector Erase instruction can be executed.
Table 11. Sector Addresses
Sector Address
000000 to 00FFFF
010000 to 01FFFF
020000 to 02FFFF
030000 to 03FFFF
040000 to 04FFFF
050000 to 05FFFF
060000 to 06FFFF
070000 to 07FFFF
AT25F4096 Sector
Sector 1
Sector 2
Sector 3
Sector 4
Sector 5
Sector 6
Sector 7
Sector 8
The Sector Erase instruction erases every byte in the selected sector if the sector is not
locked out. Sector address is automatically determined if any address within the sector
is selected. The Sector Erase instruction is internally controlled; it will automatically be
timed to completion. During this time, all commands will be ignored, except RDSR
instruction. The AT25F4096 will automatically return to the write disable state at the
completion of the Sector Erase cycle.
CHIP ERASE (CHIP ERASE): As an alternative to the Sector Erase, the Chip Erase
instruction will erase every byte in all sectors that are not locked out. First, the device
must be write enabled via the WREN instruction. Then the Chip Erase instruction can be
executed. The Chip Erase instruction is internally controlled; it will automatically be
timed to completion. The Chip Erase cycle time typically is 8 seconds. During the inter-
nal erase cycle, all instructions will be ignored except RDSR. The AT25F4096 will
automatically return to the write disable state at the completion of the Chip Erase cycle.
10
AT25F4096
2454G–SFLSH–5/06
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